Opening ID:		FPGA-VHDL-ENG
Date Created		11/18/2009 2:56:08 PM
Position:		FPGA/VHDL Engineer
Type:		TS w/ Full Scope Poly
Location:		Fort Meade/Hanover, MD
General Description:		Experience with the design, implementation, and integration of VHDL signal processing cores using the Xilinx Virtex 3 and Virtex 5 family of FPGAs. Current task will be integration of existing design into an operational system. Future tasking will be the porting of the existing design from the Virtex 3 to the Virtex 5 and adding additional functionality. In addition to VHDL skills, experience in the design and development of various receiver components such as channelizers, demodulators, equalizers, etc. is required. Must be fully cleared.
Additional Description:
Minimum Experience:		9+ Years
Contact Information:		Recruiting; E-mail; (410) 993-1699
We take pride in our diverse environment, EOE, M/F/D/V. Current openings may change without notice at any time.

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